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PMU measurements and estimated states (history): click here.

PMU measurements and estimated states (live): click here.

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The EPFL Smart Grid project was created by the joint efforts of two EPFL laboratories: DESL and LCA2. The project goal is to build a real-time monitoring infrastructure of the 20kV active distribution network (ADN) of the EPFL campus.

We are proud to announce that we achieve a latency of only 65 ms between the moment when we sample voltage and current waveforms and the moment the estimated state is displayed.

Map of the EPFL campus with the locations of monitored medium-voltage transformers and communication infrastructure.

System architecture

The EPFL electrical network is a particularly challenging distribution network where all the peculiarities of active distribution networks (ADNs) are stressed. The lines are short and the load demand is largely variable in function of the hour of the day and the weather conditions. Moreover, active power injections are present as 2MW of photovoltaic panels are installed together with 6MW of combined heat and power generation units. These conditions, and the large use of power electronics, heavily affect the voltage and current profiles which makes the EPFL campus a challenging test bed for the developed infrastructure. We can see the map of the campus on the Figure above with the feeder that is equipped with PMUs and for which the state estimation is performed. In the near future we will expand our smart grid infrastructure by instrumenting additional feeders.

The monitoring process starts with the sensors that are connected to the medium-voltage side of the transformers. Voltage and current scaled waveforms are then fed to the Phasor Measurement Units (PMUs) in order to estimate the synchrophasors. PMUs encapsulate UDP datagrams according to IEEE C37.118.2-2011 standard. Datagrams are transmitted over a secured and dedicated communication network. A dedicated low-latency Phasor Data Concentrator (PDC) has been developed. It takes care of decapsulation, time-alignment and the replacement of missing measurements in order to feed the real-time state estimator (SE) with a consistent and complete set of data. The SE is based on Kalman filtering technique and it is developed in LabVIEW.

The main building blocks of our architecture are:

Phasor Measurement Units

Phasor measurement unit (PMU) technology is widely considered as the most advanced metering infrastructure for power systems, because it allows for synchronized and fast measurements of frequency, amplitude and phase of the power-system waveforms. In order to allow for the use of this technology in ADNs, PMUs need to satisfy severe requirements in terms of phase accuracy, harmonic rejection and performances during power system dynamics [PMU1]. In this respect we have adopted a PMU prototype developed at DESL capable of satisfying every requirement defined in the standard for class-P PMUs. In [PMU2] the synchrophasor estimation algorithm is presented, together with its deployment in a National Instruments CompactRIO 9068, composed by a reconfigurable Artix-7 FPGA and a dual-core ARM Cortex-A9 processor and equipped with a customized Linux-RT OS.

In order to interface the PMU analog input modules with the power-system waveforms (i.e., 3-phase nodal voltages and nodal injected currents), the high-voltage/current signals need to be transformed to low voltage signals with the minimum amplitude/phase distortion possible. In this respect, an improved version of the Altea CVS-24 [PMU3] was selected. These sensors are 0.1-class compliant (Figure below shows a sensor installation).

EPFL-campus smart-grid components: (top left figure) GPS antenna, (bottom left figure) Altea CVS-24 current and voltage sensors and (figure on the right) rack containing the PMU (top shelf), the SHDSL modem (middle shelf) and the UPS (bottom shelf).

Dedicated Communication Network

We built a dedicated communication network for security and robustness (the campus intranet is not secured in case of power outages). We use IPv6 rather than IPv4 in order to prevent future transition issues. We avoided expensive cabling deployments by re-using existing twisted pair cables, originally installed for telephony. These cables are passive and are star-wired from a central point, the “PBX room”, where backup power is available. Communication over twisted pair cables uses the single-pair high-speed digital subscriber line (SHDSL) technology, as these cables are too long for Ethernet. Traffic from all PMUs is concentrated at the SHDSL concentrators (called DSLAMs) located in the PBX room. This would also be the natural place to locate the PDC and SE machines; however, we have only very restricted access to it. Thus, we had to place the PDC and SE machines in a more convenient location; for communications from the PBX room to PDC, we had to use more expensive optical fibers at 100 Mb/s, as the bitrate of SHDSL (2 Mb/s) is not sufficient here. The whole network is resilient to up to 8 hours of power outage; it is traffic-engineered to ensure enough capacity for the generated traffic.

The entire communication network is duplicated. We developed an IP version of the parallel redundancy protocol, called IPRP [COM1]; it takes care of duplicating UDP packets (at PMUs) and removing duplicates (at the PDC). This provides 0-ms repair of packet losses. We implemented IPRP as a transport layer solution in the Linux operating systems of the PMUs and PDC; this has the benefit of not requiring any changes to any PMU/PDC applications or to any network devices.

Security

We have also put security mechanisms into place to ensure that the ICT infrastructure is resilient to insider and outsider cyber-attacks. The security mechanisms we implement guarantee that access to all devices in the ADN is limited only to authorized personnel. Each authorized personnel is assigned separate user credentials; everyone is held accountable for their activities in the network. Accountability is enforced by implementing a logging mechanism to record each and every activity a user performs and by analyzing the log data to identify suspicious activities.

We have also implemented network-access control mechanisms to prevent an outsider from gaining access to the ADN that uses a malicious (rogue) device. All devices directly connected to the ADN are authenticated using their credentials (digital certificates) before they start any sort of communication with any device in the network. The digital certificates are also used to secure the communication between the field devices (PMU’s) and the PDC. DTLS is used for application-layer (end-to-end) secure communication. We also implement MACSec for hop-by-hop security in order to ensure that bogus traffic injected by a rogue device is discarded at the next switch. This prevents DoS attacks because such traffic does not propagate beyond the first link where the traffic is injected.

The ADN’s communication infrastructure is also physically separate from the rest of the campus’ public communication infrastructure. There is only minimal communication with the public network in order to publish the synchrophasor data, as well as the SE output, to the outside world. This communication passes through a single tightly secured interfacing point (security gateway) that opens only the required ports. This security gateway serves as a protective barrier by effectively shielding the ADN from any incoming attacks from the public network.

Phasor-Data Concentrator

The phasor-data concentrator (PDC) collects synchrophasor data and other quantities (i.e., frequency, rate-of-change-of-frequency, nodal injected/absorbed powers, etc.) estimated by the PMUs and transmits the information to other applications such as visualization tools or state estimator. The PDC deployed on the EPFL campus was fully developed by the Authors in LabVIEW and it is hosted, together with the state estimation, on a dedicated workstation. The synchrophasors are aggregated and time-aligned in a circular buffer, according to their timestamps. A subset of these measurements is then pushed to the state estimator with minimum time latency. Since the PMUs streams the data at 50 fps, an adaptive algorithm was developed in order to ensure that the available measurements are forwarded within 20ms, thus increasing the determinism of the process.

Finally, we note that the machine hosting the PDC and SE is GPS synchronized, hence we are able to identify and solve eventual bottlenecks in the whole chain that might result in an increased total latency.

State Estimator

The state estimator receives the data from the PDC and estimates the system state, defined in rectangular coordinates as the 3-phase real and imaginary parts of the voltage phasors at each network bus. We implemented the SE method called discrete Kalman filter (DKF) [SE1]. In [SE2] the adopted DKF-SE algorithm is described and an off-line assessment of its accuracy performances is performed. This DKF-SE is suitable for 3-phase systems and relies only on nodal voltage and injected current synchrophasor measurements provided by PMUs.

Furthermore, every set of measurements received by the PDC is analyzed in order to find and replace eventual corrupted data. The algorithm that describes this pre-estimation filtering process of bad data is available in [SE3].

The state estimator located in the server room of the BC building of our campus.

[PMU1] M. Paolone, A. Borghetti, C.A. Nucci, “A synchrophasor estimation algorithm for the monitoring of active distribution networks in steady state and transient conditions, ” Proc. of the 17th Power Systems Computation Conference, Stockholm, Sweden, Aug. 22-26, 2011.

[PMU2] P. Romano, M. Paolone, “Enhanced Interpolated-DFT for Synchrophasor Estimation in FPGAs: Theory, Implementation, and Validation of a PMU Prototype,” IEEE Trans. on Instr. and Meas. (to appear).

[PMU3] Altea Power and Monitoring solutions [Online]. web site: http://www.alteasolutions.eu/.

[COM1] Popovic, M., Mohiuddin, M., Tomozei, D.-C., and Le Boudec, J.-Y. IPRP: Parallel Redundancy Protocol for IPv6 Networks. Tech. rep., EPFL, 2014.

[SE1] G. Welch and G. Bishop, “An introduction to the Kalman filter,” TR 95-041, Dep. of Computer Science, University of North Carolina, USA, July 2006.

[SE2] L. Zanni, M. Pignati, S. Sarri, R. Cherkaoui, M. Paolone, “Probabilistic assessment of the process-noise covariance matrix of discrete Kalman filter state estimation of active distribution networks,” Proc. International Conference of Probabilistic Methods Applied to Power Systems, Durham, UK, Jul. 7-10, 2014.

[SE3] M. Pignati, L. Zanni, S. Sarri, R. Cherkaoui, J. Le Boudec, and M. Paolone, “A Pre-Estimation Filtering Process of Bad Data for Linear Power Systes State Estimator using PMUs,” in PSCC 2014, 2014.

Since April 2013, the project is partly funded by the Swiss Nano-Tera initiative: see here the page of the Nano-Tera SmartGrid project.